Binary-Coded Ternary: Difference between revisions

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(Created page with "<div style="float: right; text-align: center;"> <table class="tt"> <tr> <td colspan="3">Dual Binary</td> </tr> <tr> <td class="tt_bb"><b>N</b></td> <td class="tt_bb"><b>P</b></td> <td class="tt_bb tt_bl"><b>T</b></td> </tr> <tr> <td>0</td> <td>0</td> <td class="tt_bl tt_g">0</td> </tr> <tr> <td>0</td> <td>1</td> <td class="tt_bl tt_b">+</td> </tr> <tr> <td>1</td> <td>0</td> <td class="tt_bl tt_r">-</td> </tr>...")
 
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<b>Binary-coded Ternary (BCT)</b> is an implementation of ternary logic built on top of normal binary logic. Using two bits or wires per trit as the base. Sub-circuits made with binary logic gates can emulate the truth tables of ternary logic gates.
 
This implementation is useful with logic simulators and would most likely function on an FPGA. However because each trit needs two wires a design would be extremely bloated with interconnects and bus lines. Doubling the wiring and logic and loosing most of the advantages of a ternary computer.
 
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<b>Dual Binary</b> is an implementation of ternary logic built on top of normal binary logic. Using two bits or wires per trit as the base. Sub-circuits made with binary logic gates can emulate the truth tables of ternary logic gates.
This implementation is useful with logic simulators and would most likely function on an FPGA or ASIC. However because each trit needs two wires a design would be extremely bloated interconnects and bus lines.
For a discrete component build or fully custom chip I would explore other options that do not waste so chip much space

Latest revision as of 17:27, 10 March 2025

Binary-coded Ternary (BCT) is an implementation of ternary logic built on top of normal binary logic. Using two bits or wires per trit as the base. Sub-circuits made with binary logic gates can emulate the truth tables of ternary logic gates.

This implementation is useful with logic simulators and would most likely function on an FPGA. However because each trit needs two wires a design would be extremely bloated with interconnects and bus lines. Doubling the wiring and logic and loosing most of the advantages of a ternary computer.

BCT
N P T
0 0 0
0 1 +
1 0 -
1 1 ?