NZP: Difference between revisions
From T729 Balanced Ternary Computer
Jump to navigationJump to search
(Created page with "Negitive, Zero, Positive logic uses negative voltage, ground, and positive voltage. This form of ternary logic is possible but it is not power efferent. A lot of transistors will need to swing the full -V to V range which will drag down clock speeds.") |
No edit summary |
||
| Line 1: | Line 1: | ||
Negitive, Zero, Positive logic uses negative voltage, ground, and positive voltage. | Negitive, Zero, Positive logic uses negative voltage, ground, and positive voltage. | ||
This form of ternary logic is possible but it is not power efferent. A lot of transistors will need to swing the full -V to V range which will drag down clock speeds. | This form of ternary logic is possible but it is not power efferent. A lot of transistors will need to swing the full -V to V range which will drag down clock speeds and increase power usage. | ||
Revision as of 07:24, 15 September 2024
Negitive, Zero, Positive logic uses negative voltage, ground, and positive voltage.
This form of ternary logic is possible but it is not power efferent. A lot of transistors will need to swing the full -V to V range which will drag down clock speeds and increase power usage.
