Binary-Coded Ternary
From T729 Balanced Ternary Computer
Dual Binary is an implementation of ternary logic built on top of normal binary logic. Using two bits or wires per trit as the base. Sub-circuits made with binary logic gates can emulate the truth tables of ternary logic gates.
This implementation is useful with logic simulators and would most likely function on an FPGA or ASIC. However because each trit needs two wires a design would be extremely bloated interconnects and bus lines.
For a discrete component build or fully custom chip I would explore other options that do not waste so chip much space
| Dual Binary | ||
| N | P | T |
| 0 | 0 | 0 |
| 0 | 1 | + |
| 1 | 0 | - |
| 1 | 1 | ? |
