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From T729 Balanced Ternary Computer
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== Logic Gates == | == Logic Gates == | ||
=== Ternary === | === Ternary === | ||
==== 2 Input ==== | |||
* [[SUM Ternary Gate|SUM]] | * [[SUM Ternary Gate|SUM]] | ||
* [[CON Ternary Gate|CON]] | * [[CON Ternary Gate|CON]] | ||
* [[ANY Ternary Gate|ANY]] | * [[ANY Ternary Gate|ANY]] | ||
* [[XOR Ternary Gate|XOR]] | * [[XOR Ternary Gate|XOR]] | ||
==== 1 Input ==== | |||
* [[NEG Ternary Gate|NEG]] | * [[NEG Ternary Gate|NEG]] | ||
* [[INC Ternary Gate|INC]] | * [[INC Ternary Gate|INC]] | ||
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=== Binary === | === Binary === | ||
==== 2 Input ==== | |||
* [[AND Binary Gate|AND]] | * [[AND Binary Gate|AND]] | ||
* [[NAND Binary Gate|NAND]] | * [[NAND Binary Gate|NAND]] | ||
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* [[NOR Binary Gate|NOR]] | * [[NOR Binary Gate|NOR]] | ||
* [[XOR Binary Gate|XOR]] | * [[XOR Binary Gate|XOR]] | ||
==== 1 Input ==== | |||
* [[NOT Binary Gate|NOT]] | * [[NOT Binary Gate|NOT]] | ||
</div> | </div> |