FPGA
From T729 Balanced Ternary Computer
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I do not have any hands-on experience with FPGAs yet and do not want to get into FPGAs until I have a stable T729 design already. I won't know what size FPGA to get until the T729 architecture is mostly complete. Large FPGAs can get quite expensive.
I foresee some limitations running a ternary project on an FPGA.
- FPGAs can only do binary. Must use ADC and DACs to handle analog signals.
- Only BCT implementation would work on an FPGA.
- Memory access.
- Ternary decoder to binary encoder would allow for sequential access of binary SRAM/DRAM. However, would consume a lot of logic and be slower.
- Direct mapping; 12-trits would take 24-bits. Wiring the 12-trit BCT memory address space directly to 24-bit address 16-bit wide memory will be fast but not utilize the majority of the memory.
- (2^24 minus 3^12)