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From T729 Balanced Ternary Computer
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** [[MIN (Ternary Gate)|MIN]]
** [[MIN (Ternary Gate)|MIN]]
* 1 Input
* 1 Input
** [[NEG Ternary Gate|NEG]]
** [[NEG (Ternary Gate)|NEG]]
** [[INC Ternary Gate|INC]]
** [[INC (Ternary Gate)|INC]]
** [[DEC Ternary Gate|DEC]]
** [[DEC (Ternary Gate)|DEC]]
</div>
</div>
<div class="hcat">
<div class="hcat">
=== Binary ===
=== Binary ===
* 2 Input
* 2 Input
** [[AND Binary Gate|AND]]
** [[AND (Binary Gate)|AND]]
** [[NAND Binary Gate|NAND]]
** [[NAND (Binary Gate)|NAND]]
** [[OR Binary Gate|OR]]
** [[OR (Binary Gate)|OR]]
** [[NOR Binary Gate|NOR]]
** [[NOR (Binary Gate)|NOR]]
** [[XOR Binary Gate|XOR]]
** [[XOR (Binary Gate)|XOR]]
* 1 Input
* 1 Input
** [[NOT Binary Gate|NOT]]
** [[NOT (Binary Gate)|NOT]]
</div>
</div>
</div>
</div>

Revision as of 18:01, 29 May 2024


Hobby balanced ternary computer project. Work in progress.

Wiki

Logic Gates

Ternary

Binary

Logic Simulation

Logic Implementation

Physical Implementation

Discord

This wiki is for documentation.
Current discussions and work is on Discord.
https://discord.gg/3an392s3vZ