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From T729 Balanced Ternary Computer
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| Line 28: | Line 28: | ||
** [[NEG (Ternary Gate)|NEG]] | ** [[NEG (Ternary Gate)|NEG]] | ||
** [[INC (Ternary Gate)|INC]] | ** [[INC (Ternary Gate)|INC]] | ||
** [[DEC (Ternary Gate)|DEC]] | ** [[DEC (Ternary Gate)|DEC]]</div><div class="hcat"> | ||
=== Binary === | === Binary === | ||
* +2 Input | * +2 Input | ||
| Line 37: | Line 35: | ||
** [[XOR (Binary Gate)|XOR]] | ** [[XOR (Binary Gate)|XOR]] | ||
* 1 Input | * 1 Input | ||
** [[NOT (Binary Gate)|NOT]] | ** [[NOT (Binary Gate)|NOT]]</div></div> | ||
<div class="hcat"> | <div class="hcat"> | ||
Revision as of 08:40, 15 March 2025
Hobby balanced ternary computer project. Work in progress.
Logic Gates
Computer
Processor
Programming
BCT Implementation
Other Implementations
Discord
This wiki is for documentation.
Current discussions and work is on Discord.
https://discord.gg/3an392s3vZ
